Modern circuit packaging typically involves interconnecting multi-pin electronic components to cards or other circuit support structures. Often, such multi-pin components are connected directly to such support structures using well-known techniques such as ball grid array (BGA) surface mount chip packages that utilize a grid of solder balls as connectors. BGA packages are noted for their compact size, high lead count potential and low inductance. BGA chips are typically easier to align to the printed circuit board, because the leads, which are called “solder balls” or “solder bumps,” are farther apart than leaded packages. Because the leads are underneath the chip, BGA has led the way to chip scale packaging (CSP) where the package is typically not more than 1.2× the size of the semiconductor die itself. However, after a solder reflow process is accomplished, BGA packages are permanently attached to the support structure.
A potential problem exists when soldering BGA devices to substrates. It is important that sufficient heat be applied to ensure that all the balls in the grid melt sufficiently for every joint to be formed and create metallurgical bonds between corresponding metal pads and the solder balls. Good process control usually avoids any such problems, however, the devices and joints cannot be fully tested by initially checking the electrical performance after soldering. It is possible that, over time, the joint or the device utilizing the solder joint connection, may fail. Further, a complex electronic assembly may utilize many devices, each of which may fail or inadequately perform during burn-in processing or other quality testing, when tested as a complete system assembly.
It is not possible to view the soldered connections using optical techniques. The only satisfactory means of inspection is to use X-ray inspection as this means of inspection allows inspection through the device itself at the soldered joints therebeneath. Further, despite known good die or device testing, it is not always possible to predict adequate performance of an assembly until it is fully assembled and tested in-situ.
As might be anticipated, it is not easy to rework boards containing BGAs unless the correct equipment is available. If a BGA is suspected as being faulty, it is possible to remove the device. This is achieved by locally heating the device to melt the solder underneath it. In the BGA rework process, heating is often achieved at a specialized rework station having a jig fitted with an infrared heater, a thermocouple to monitor the temperature, and a vacuum device for lifting the package. Great care is needed to ensure that only the BGA is heated and removed. Other devices nearby should be only minimally affected to avoid damage thereto.
As electronic packages shrink and component density of packaging structures increases, the effective use of BGA packages may be compromised, particularly under circumstances where rework is probable. This is particularly true if the device being removed or neighboring devices are particularly heat sensitive.
In development environments yet another constraint exists. If only a few components (e.g., prototype or pre-production chips) are extant, it may be necessary to use those few available chips to test a relatively large number of package assemblies. Consequently, it is necessary to avoid any packaging technique wherein the chips are permanently attached to the package assembly. Further, it may also be important that pin connections be accessible for testing or other evaluation. Packaging structures of the prior art have been ineffective in meeting these challenging demands.
It would, therefore, be desirable to provide a connector that allows easy interchangeability of high connection density devices in sub-assembles while providing ready access to connections for in situ testing of devices and/or circuits.